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[Varies] Component-Watchdog on SPI

Develop and implement a procedure to detect failures of components on an SPI bus.

Course type M.Sc. Teamproject, M.Sc. Thesis 
Instructors Bernd Westphal, Andreas Podelski, Daniel Dietsch, Sergio Alejandro Feo-Arenis
Credits Depends 
Course Catalog Depends 

Today, even medium sized embedded systems consist of multiple components that are interconnected by buses. Technically, these buses are typically rather simple, mainly for reasons such as cost.

In this project, the candidate is supposed to develop a procedure for reliable detection of failures of a number of components connected via an SPI bus. The procedure shall be implemented for a particular embedded system.

The candidate should have a fair background in software-engineering, interest in software development for embedded systems (in C), and at best some background in formal methods.

Note: This is a joint project with company SeCa GmbH. The project is supposed to be conducted as part of a 9 month internship (``Werkstudent'') where the candidate is employed as a student worker at SeCa.


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